A 1-μW/MHz <i>RC</i> Oscillator With Three-Point Trimmed 2.1-ppm/°C and Single-Point Trimmed 8.7-ppm/°C Stability From40 °C to 95 °C

This article presents techniques to improve the frequency stability of $RC$ oscillators by performing first- and second-order temperature compensation without needing resistors with opposite coefficients (TCs). Using proposed three-point digital trim, a prototype 100-MHz frequency-locked loop (FLL)-based oscillator fabricated in 65-nm CMOS process achieves an inaccuracy ±140 ppm over −40 °C 95 °C, 83-ppm/V voltage sensitivity, 1.3-ppm Allan deviation floor, 1- notation="LaTeX">$\mu \text{W}$ /MHz power efficiency. When only single-point trim is performed using multiple linear regression model leveraging strong correlation between three switched resistors, ±587 ppm.